$A$ $NOR$ gate and a $NAND$ gate are connected as shown in the figure. Two different sets of inputs are given to this setup. In the first case, the inputs to the gates are $A=0, B=0, C=0$. In the second case, the inputs are $A=1, B=0, C=1$. The output $D$ in the first case and second case respectively are

  • A
    $0$ and $0$
  • B
    $0$ and $1$
  • C
    $1$ and $0$
  • D
    $1$ and $1$

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