The following figure (i) shows a logic gate c | vedclass

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(B) By observing the voltage waveforms in figure $(ii)$,we can construct the truth table for the inputs $A, B$ and output $C$:      $A$    $B$    $C$

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$AND$

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(B) By observing the voltage waveforms in figure $(ii)$,we can construct the truth table for the inputs $A, B$ and output $C$:      $A$    $B$    $C$        $1$    $1$    $1$        $0$    $1$    $0$        $1$    $0$    $0$        $0$    $0$    $0$  From the truth table,we can see that the output $C$ is $1$ only when both inputs $A$ and $B$ are $1$. This behavior corresponds to the $AND$ gate,where the output is high $(1)$ if and only if all inputs are high $(1)$.

The following figure $(i)$ shows a logic gate circuit with two inputs $A$ and $B$ and output $C$. The voltage waveforms of $A, B$,and $C$ are as shown in the figure $(ii)$ given below. The logic circuit gate is:

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