The truth table of the given circuit diagram | vedclass

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(B) The circuit consists of two $AND$ gates,two $NOT$ gates,and one $OR$ gate.The inputs to the first $AND$ gate are $A$ and $\overline{B}$,so its out

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$A$$B$$y$$0$$0$$0$$0$$1$$1$$1$$0$$1$$1$$1$$0$

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(B) The circuit consists of two $AND$ gates,two $NOT$ gates,and one $OR$ gate.The inputs to the first $AND$ gate are $A$ and $\overline{B}$,so its output is $A \cdot \overline{B}$.The inputs to the second $AND$ gate are $\overline{A}$ and $B$,so its output is $\overline{A} \cdot B$.The final $OR$ gate combines these outputs to give $Y = A \cdot \overline{B} + \overline{A} \cdot B$.This is the Boolean expression for an $XOR$ gate.The truth table for an $XOR$ gate is:- If $A=0, B=0$,then $Y=0$.- If $A=0, B=1$,then $Y=1$.- If $A=1, B=0$,then $Y=1$.- If $A=1, B=1$,then $Y=0$.Comparing this with the given options,option $B$ is correct.

$A$. Small Scale Integration $(SSI)$	$I$. Logic gates $< 100$
$B$. Medium Scale Integration $(MSI)$	$II$. Logic gates $> 1000$
$C$. Large Scale Integration $(LSI)$	$III$. Logic gates $\leq 10$
$D$. Very Large Scale Integration $(VLSI)$	$IV$. Logic gates $< 1000$

The truth table of the given circuit diagram is:

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The logic circuit shown above is equivalent to:

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$A$	$B$	$y$
$0$	$0$	$1$
$0$	$1$	$0$
$1$	$0$	$0$
$1$	$1$	$1$

$A$	$B$	$y$
$0$	$0$	$0$
$0$	$1$	$1$
$1$	$0$	$1$
$1$	$1$	$0$

$A$	$B$	$y$
$0$	$0$	$0$
$0$	$1$	$0$
$1$	$0$	$0$
$1$	$1$	$1$

$A$	$B$	$y$
$0$	$0$	$1$
$0$	$1$	$1$
$1$	$0$	$1$
$1$	$1$	$0$