The diagram of a logic circuit is given below | vedclass

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(C) The circuit consists of two $OR$ gates followed by an $AND$ gate.Output of the upper $OR$ gate $= W + X$.Output of the lower $OR$ gate $= W + Y$.T

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$W + (X \cdot Y)$

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(C) The circuit consists of two $OR$ gates followed by an $AND$ gate.Output of the upper $OR$ gate $= W + X$.Output of the lower $OR$ gate $= W + Y$.These two outputs are fed into an $AND$ gate.Therefore,the net output $F = (W + X) \cdot (W + Y)$.Using the distributive law of Boolean algebra: $F = W \cdot W + W \cdot Y + X \cdot W + X \cdot Y$.Since $W \cdot W = W$,we have $F = W + W \cdot Y + X \cdot W + X \cdot Y$.Factoring out $W$: $F = W(1 + Y + X) + X \cdot Y$.Since $(1 + Y + X) = 1$,we get $F = W \cdot 1 + X \cdot Y = W + X \cdot Y$.

The diagram of a logic circuit is given below. The output $F$ of the circuit is represented by

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